Deliverable D2.1

DELIVERABLE D2.1
Title: Report on D-band radio front end stage design
Date: Sep. 2018
Dissemination: Confidential
Abstract: This report presents the design details of a D-band radio transceiver front end building blocks, including the power amplifier (PA), low noise amplifirer (LNA), RF mixers, phase shifter and the quadrature coupler, that are used to demonstrate the feasibility of a low-cost SiGe BiCMOS transceiver analog front end enabling link data rate up to 100 Gb/s in D-band. The studies and design approach of an integrated D-band frequency synthesis IC is described separately in deliverable D2.2. Both theoretical investigations and circuits being implemented are presented for all of these important sub-blocks. The main purpose of this document is to provide the complete report on the WP2 task 2.1 and 2.2 design activities mainly based on the reference specifications defined in task 1.2 and 1.3 and reported in the deliverables D1.2 and D1.3. Starting from the specification tables, the design concepts and approaches to each D-band transceiver front end functional block is reported together with all the details related to the physical implementation on the ST’s BiMOS055 process.
Keywords: Radio technology, millimetre-wave, transceiver, front-end, D-band communications, oscillator, frequency synthesizer, phase noise, power amplifier, BiCMOS, SiGe, power efficiency.