Deliverable D2.7

Title: Report on radio front end integration design
Date:  Oct. 2019
Dissemination: Confidential
Abstract: This report presents the design details of an integrated D-band radio transceiver front end chip set, including the following 4 ICs:
1. Integrated transmitter up-converter and preamplifier
2. Integrated satellite TX driving 4 antenna elements
3. Integrated receiver down-converter and VGA
4. Integrated satellite RX receiving from 4 antenna elements
The studies and design approach of the integrated D-band frequency synthesis IC is described separately in deliverable D2.4. Both theoretical investigations and circuits being implemented are presented for all of these important chips. The main purpose of this document is to provide the complete report on the WP2 task 2.3 design activities, mainly based on the reference specifications defined in task 1.2 and 1.3 and reported in the deliverables D1.3 to D1.5. Starting from the specification tables, the design concepts and approaches to each D-band transceiver front end functional IC are reported together with all the details related to the physical implementation on the ST’s BiMOS055 process.
Keywords: Radio technology, millimetre-wave, transceiver, front-end, D-band communications, oscillator, frequency synthesizer, phase noise, power amplifier, BiCMOS, SiGe, power efficiency.